Resolve tfrag LOD parent linkage: guard absent tiers by their counts

The four V4_8 parent arrays are classified by VU address, but the
addresses collide: on level 0 patch 1,
unk_indices_2_lod_01_addr == parent_indices_lod_0_addr == 291, and
unk_indices_2_lod_0_addr == indices_addr == 294. Matching on address
alone cannot separate them, and it fails silently -- the arrays still
parse, they just hold the wrong numbers.

Two corrections, and the first one is worth recording because it looked
like a data problem rather than a code one:

Each V4_8 element is 4 bytes and holds four indices, so an array of N
entries is count*4 bytes, not count. An earlier analysis compared the
unpack's element count against the position counts and concluded that
15,000 patches could not hold enough parents. That was the wrong unit;
the data was fine.

unk_06 and unk_0a suppress an empty tier. When the extra vertex-info
count is zero there is no extra array and its address is simply the next
tier's, so guarding those branches on the count lets the address fall
through to the array that exists. That one change took resolved LOD-0
entries from 28,739 to 341,306.

Result: of 886,841 vertex-info entries across all 27 levels, 516,492 are
common and have no link by design, and all 370,349 LOD entries resolve --
29,043 LOD-01 and 341,306 LOD-0 -- with zero failures. Each resolves to a
real first parent, a LOD-01 parent that is always a common entry, and
three positions inside the patch. A common entry never claims a parent.

Morphing can now be completed: a patch knows which LOD to draw, how far
to blend each vertex toward its parents, and where those parents are.

docs/roadmap.md

@@ -20,7 +20,8 @@ early, while they are still cheap to retire.
       header, and the `data` extent is parsed as a container of byte ranges. The
       geometry decompresses: level 0 yields 16,969,296 bytes of level content
       from a 9.7 MB stream.
-- [ ] Next: tfrag parent indices, then the first drawable frame.
+- [ ] Next: the first drawable frame — build the GS register set and a
+      Bevy fly-camera over level 0's tfrags.
 
 The disc being the exact build the reference projects pin is the single
 biggest favourable fact so far: no disc conversion, no regional timing work,
@@ -147,11 +148,12 @@ Phase 1 hands over the extents; this phase works out what each one contains.
       the coarser mode and distance never moves back to finer detail. Morph
       weights run 0..1 across each tier's band, and collapse replaces an entry
       with its first parent rather than blending it.
-- [ ] tfrag parent indices: the four V4_8 arrays are classified by VU address,
-      but the addresses collide (`unk_06` and `unk_0a` are zero, so an absent
-      tier shares the next one's address). 57,782 of 374,349 LOD entries
-      resolve; the 316,548 unresolved LOD-0 entries are far too lopsided to be
-      genuine. Tried and ruled out in `plan/level-assets.md`.
+- [x] **tfrag parent indices.** The four V4_8 arrays are classified by VU
+      address, but the addresses collide, and each V4_8 element holds four
+      indices so an array is `count * 4` bytes rather than `count`. With
+      `unk_06`/`unk_0a` suppressing absent tiers, all 370,349 LOD entries
+      across the 27 levels resolve: 29,043 LOD-01 and 341,306 LOD-0, zero
+      failures. See `plan/level-assets.md` for the two corrections.
 - [ ] `gameplay` — begins `WAD` + a per-level byte, and does *not* decode with
       the WAD LZ77 decoder. All 27 levels fail identically, so the input is
       wrong rather than the decoder. Ruled out: bit order, header length, the